The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2002

Filed:

Jun. 20, 2000
Applicant:
Inventors:

Hideyuki Nakamura, Hanno, JP;

Nobuki Miyakoshi, Hanno, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/976 ;
U.S. Cl.
CPC ...
H01L 2/976 ;
Abstract

A field effect transistor having a high breakdown withstand capacity is provided. An active region is surrounded by a fixed potential diffusion layer , and a channel region is formed in the active region . A gate pad is provided outside the fixed potential diffusion layer . Minority carriers injected at a peripheral region of the active region flow into the fixed potential diffusion layer , which prevents breakdown attributable to concentration of the carriers. The fixed potential diffusion layer is surrounded by a plurality of guard ring diffusion layers through , and a pad diffusion layer formed in a position under the gate pad is connected to the innermost guard ring diffusion layer . Since this encourages expansion of a depletion layer under the gate pad , an increased breakdown voltage is provided.


Find Patent Forward Citations

Nakamura, Hideyuki. (2002). Field effect transistor having high breakdown withstand capacity (U.S. Patent No. 6369424). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6369424

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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