The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2002

Filed:

Jun. 29, 2000
Applicant:
Inventor:

Jung Ho Lee, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1336 ;
U.S. Cl.
CPC ...
H01L 2/1336 ;
Abstract

A method of manufacturing a transistor having an elevated drain in a substrate includes the steps of: forming a gate structure on the substrate; providing a first doped region adjacent to one end of the gate structure, the first doped region having a first dopant concentration level; forming a second doped region overlying the first doped region, the second doped region having a second dopant concentration level; and forming a third doped region overlying the second doped region, the third doped region having a third dopant concentration level different from the second dopant concentration level, in which the elevated drain includes the third doped region, where the second dopant concentration level is lower than the third concentration level.


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