The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 02, 2002
Filed:
Dec. 19, 2000
Masatoshi Sonoda, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
A semiconductor storage device that can be selectable between input/output (I/O) configuration and have reduced area for data buses and/or reduced number of circuit elements is disclosed. According to one embodiment, a semiconductor storage device may include first and second memory cell arrays ( and ). Eighteen first sense amplifiers (SA(L) ) can be connected to the first memory cell array ( ) and eighteen second sense amplifiers (SA(R) ) can be connected to the second memory cell array ( ). In addition, eighteen first I/O circuits (I/O(L) ) may correspond to the first sense amplifiers (SA(L) ) and eighteen second I/O circuits (I/O(R) ) may correspond to the second amplifiers (SA(R) ). Eighteen data buses (DB -DB ) can be situated between the sense amplifiers (SA(L) and SA(R) ) and I/O circuits (I/O(L) and I/OR) ). Each data bus may be separated into at least two different portions by a disconnecting device (T -T ). In one I/O configuration (e.g., x36), disconnecting devices (T -T ) separate the data buses (DB -DB ) into two different portions, in another I/O configuration (e.g., x18) the data buses (DB -DB ) are not separated into different portions.