The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2002

Filed:

Jun. 22, 2000
Applicant:
Inventors:

Ouelid Abdesselem, Toulouse, FR;

Dejan Mijuskovic, Folsom, CA (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 3/01 ;
U.S. Cl.
CPC ...
G05F 3/01 ;
Abstract

A method and circuit ( ) for dynamically adjusting the supply voltage (Vdd) in a digital circuit ( ) determines the propagation delay (tpd) of a signal along a signal path ( ) in the digital circuit and adjusts the supply voltage so that the determined propagation delay equals a predetermined period, such as the clock period of the clock signal (CLK) which clocks the digital circuit. the determined propagation delay equals the predetermined period, the adjusted supply voltage is applied to the digital circuit ( ). This technique can be used to optimise power consumption and processing capability.


Find Patent Forward Citations

Abdesselem, Ouelid. (2002). Methods and circuits for dynamically adjusting a supply voltage and/or a frequency of a clock signal in a digital circuit (U.S. Patent No. 6366157). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6366157

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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