The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2002

Filed:

Nov. 10, 1998
Applicant:
Inventor:

Takehiko Hamada, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/100 ;
U.S. Cl.
CPC ...
G06F 1/100 ;
Abstract

In displaying positional information on a fail cell or the like after a test on a semiconductor memory with a memory tester, an address conversion section of PC converts, based on positional information obtained from the memory tester, one address array information to a plurality of types of address array information of a logical address and an capacity section address, and a display section displays the positional information based on the plurality of types of address array information. This enables the state of a fail cell to be easily understood, contributing to improved efficiency of fault analysis.


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Hamada, Takehiko. (2002). Device and method for outputting positional information for lsi cells and recording medium for positional information output program for lsi cells (U.S. Patent No. 6363500). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6363500

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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