The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 2002
Filed:
Dec. 12, 2000
Applicant:
Inventor:
Joseph G. Petrofsky, Cupertino, CA (US);
Assignee:
Linear Technology Corporation, Milpitas, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/556 ;
U.S. Cl.
CPC ...
G06F 7/556 ;
Abstract
The invention provides methods and apparatus for performing RMS-to-DC conversion in which the input signal is sampled using circuitry that includes a clock signal. The clock signal is dithered, however, to account for various problems that may occur, such as aliasing. The dithering may occur during the sampling prior to the conversion, such as when the input signal is converted to a digital signal prior to the conversion. Alternately, the dithering may occur as part of the RMS-to-DC conversion.
Petrofsky, Joseph. (2002). Apparatus and methods for performing rms-to-dc conversion utilizing clock dithering (U.S. Patent No. 6362677). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6362677
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile