The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2002

Filed:

Jul. 09, 1999
Applicant:
Inventors:

Hitoshi Iwata, Aichi-ken, JP;

Makoto Murate, Aichi-ken, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1326 ; H01L 2/1479 ;
U.S. Cl.
CPC ...
H01L 2/1326 ; H01L 2/1479 ;
Abstract

A first p-type silicon layer ( ) is formed as a buried layer in a p-type single crystal silicon substrate ( ), and an n-type silicon layer ( ) is formed on the upper side of the silicon substrate ( ). A second p-type silicon layer ( ) for forming an opening is defined in the n-type silicon layer ( ), and a metal protecting film ( ) is formed on the upper side of the n-type silicon layer ( ). An electrode layer ( ) is formed on the rear side of the silicon substrate ( ) via an oxide film (17). The electrode layer ( ) and the silicon substrate ( ) are electrically connected to each other via a connecting opening ( ) at portions aligned with the first p-type silicon layer ( ). After a positive terminal and a negative terminal of a DC power source (V) are connected to the electrode layer ( ) and to a counter electrode ( ) respectively, a voltage is applied between the electrode layer ( ) and the counter electrode ( ) to carry out anodization.


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