The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2002

Filed:

Oct. 28, 1999
Applicant:
Inventors:

Yoshiharu Aimoto, Tokyo, JP;

Tohru Kimura, Tokyo, JP;

Koichi Takeda, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract

A dynamic memory including a first sense amplifier circuit directly connected to a bit line of a memory cell, a second sense amplifier directly connected to a data input/output circuit, a switching circuit connected between the first sense amplifier circuit and the second sense amplifier circuit. In a reading operation, the switching circuit is controlled to separate the first sense amplifier circuit and the second sense amplifier circuit from each other after data is read out from the memory cell, so that the read-out data is amplified by the second sense amplifier circuit and outputted from the second sense amplifier circuit to an external of the memory. On the other hand, the first sense amplifier circuit amplifies the read-out data and writes back the read-out data to the memory cell. In the writing operation, the switching circuit is controlled to interconnect the first sense amplifier circuit and the second sense amplifier circuit to each other, so that data to be written from an external is written into the memory cell through the first and second sense amplifier circuits.


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