The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2002

Filed:

Apr. 20, 2000
Applicant:
Inventor:

Marcello Criscione, Ragusa, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 1/762 ;
U.S. Cl.
CPC ...
H03K 1/762 ;
Abstract

Presented is a low-voltage automatic lock-up biasing circuit with input terminals that accept input voltages, and with an internal node coupled to both input terminals an which takes take the highest of the voltage values applied to the input terminals. This circuit uses a comparator having respective inputs connected to the input terminals and with an output connected to a level shifter. Outputs of the level shifter are coupled to respective enable elements connected between each input terminal and the internal node. The enable elements are driven each by a respective output of the level shifter.


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Criscione, Marcello. (2002). Automatic lockup low-voltage biasing circuit (U.S. Patent No. 6359497). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6359497

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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