The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2002

Filed:

Aug. 31, 2001
Applicant:
Inventor:

Arnold Chow, Sunnyvale, CA (US);

Assignee:

Pericom Semiconductor Corp., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/00 ;
U.S. Cl.
CPC ...
H03K 3/00 ;
Abstract

A large pull-down voltage-output-low VOL transistor is placed in parallel with a smaller pull-down switching transistor. The smaller switching pull-down transistor is turned on during switching. Once switching has nearly completed, the larger pull-down VOL transistor is turned on to provide a current sink for maintaining a VOL close to ground. Switching current is limited by the smaller switching pull-down transistor, while a large static sink current is provided by the VOL transistor to meet VOL requirements. The gate of the VOL transistor is controlled by p-channel and n-channel data transistors that are controlled by the data input, and p-channel and n-channel feedback transistors with gates connected to the buffer output. An upper n-channel transistor provides current to an intermediate node at the drain of the p-channel feedback transistor, keeping it near an intermediate voltage.


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