The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 12, 2002

Filed:

Sep. 24, 1998
Applicant:
Inventor:

Brian Bailey, Oregon City, OR (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

Hardware and software of a system is co-verified with synchronization events generated in the respective hardware and software verifications being accumulated and provided to the other verification on a periodic basis. The faster verification is halted to allow the slower verification to catch up, upon expiration of a synchronization window. Once caught up, the accumulated synchronization events are provided to the respective other verification. The transferred synchronization events are then in turn injected into the other verification at the same offset time into a synchronization period the synchronization events occurred in the previous synchronization period.


Find Patent Forward Citations

Bailey, Brian. (2002). Hardware and software co-verification employing deferred synchronization (U.S. Patent No. 6356862). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6356862

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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