The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 12, 2002

Filed:

Nov. 20, 2000
Applicant:
Inventors:

Vadim V. Ivanov, Tucson, AZ (US);

Gregory H. Johnson, Tucson, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/45 ;
U.S. Cl.
CPC ...
H03F 3/45 ;
Abstract

A rail-to-rail differential amplifier includes first and second input terminals, and an output terminal and an input stage including differentially connected N-channel first and second input transistors, and differentially connected P-channel third and fourth input transistors. A P-channel first cascode transistor has a source coupled to a first supply voltage to the drain of the first input transistor. An N-channel cascode transistor has a source coupled by a second resistive element to a second supply voltage and to the drain of the third input transistor. A first gain boost amplifier has an output coupled to a gate of the first cascode transistor, a first input coupled to the source of the first cascode transistor and the drain of the first input transistor, and a second input coupled to a drain of the second input transistor and a bias control circuit. A second gain boost amplifier has an output coupled to a gate of the second cascode transistor, a first input coupled to the source of the second cascode transistor and to the drain of the third input transistor, and a second input coupled to a drain of the fourth input transistor and the bias control circuit. An output stage includes a pull-up transistor coupled between the first supply voltage and the output terminal, a pull-down transistor coupled between the second supply voltage and the output terminal, and a class AB bias circuit coupled between drain electrodes of the fist and second cascode transistors and between gate electrodes of the pull-up and pull-down transistors.


Find Patent Forward Citations

Ivanov, Vadim. (2002). Rail-to-rail input/output operational amplifier and method (U.S. Patent No. 6356153). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6356153

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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