Semiconductor integrated circuit

Abstract

A plurality of for-wafer-test input/output elements exclusively used in a wafer test are arranged with a plurality of input/output ports corresponding to a plurality of internal circuits in a semiconductor integrated circuit. In the wafer test, a probe is connected with each for-wafer-test input/output element, input test signals are input from an external apparatus to the input/output ports through one for-wafer-test input/output element connected with the probe and are sent to the internal circuits. Thereafter, output test signals obtained in the internal circuits are read out to the input/output ports and are output from the input/output ports to another external apparatus through another for-wafer-test input/output element connected with the probe, so that functions of the internal circuits can be checked. Because no probe is connected with each input/output port in the wafer test, no physical damage is given to each input/output port in the wafer test, so that each input/output port can be connected with a bonding wire in an normal operation without any connection failure. Also, because the addition of one for-wafer-test input/output element for each input/output port is not adopted, the increase of the size of the semiconductor integrated circuit can be suppressed at a minimum.