The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2002

Filed:

Mar. 20, 2000
Applicant:
Inventors:

Stefan Prange, München, DE;

Heribert Geib, Grafing, DE;

Erik De Man, München, DE;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 5/12 ; H04L 2/302 ; H04L 2/706 ; H03D 3/02 ;
U.S. Cl.
CPC ...
H04L 5/12 ; H04L 2/302 ; H04L 2/706 ; H03D 3/02 ;
Abstract

A filter configuration for a demodulated QAM signal has a first channel for a cosine demodulated component of the QAM signal, a second channel for a sine demodulated component of the QAM signal, a filter circuit, which receives the two signal components and for each signal component has one transfer function that is composed of terms in phase with this signal component and terms phase-shifted from it by &pgr;/2 and/or −&pgr;/2. The circuit configuration also includes a cross branch for picking up signal portions from the respectively other channel that correspond to the phase-shifted terms of the transfer function. In a first state, the circuit configuration connects the input of the cross branch to the first channel and the output of the cross branch to the second channel, and in a second state connects the input of the cross branch to the second channel and the output of the cross branch to the first channel. A slope detector especially suitable for use with this filter configuration is also provided. The circuit configuration requires a reduced amount of circuitry and can be integrated on a small surface area of a semiconductor substrate.


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