The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2002

Filed:

Jul. 24, 2000
Applicant:
Inventor:

Narakazu Shimomura, Gojo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ;
U.S. Cl.
CPC ...
H01L 2/14763 ;
Abstract

A process of manufacturing a semiconductor device comprising: a step of forming an interlayer insulating film so as to cover a plurality of semiconductor elements formed on a semiconductor substrate, a step of forming openings in predetermined regions of the interlayer insulating film on the semiconductor elements in a manner of penetrating only halfway through the interlayer insulating film, a dual damascene step of forming contact hole by removing the interlayer insulating film remaining under the predetermined ones of the openings, thereby forming simultaneously openings for burying a wiring layer which include upper portions of the predetermined openings, a step of forming a conductive layer on the interlayer insulating film to fill at least the contact holes and the openings for burying the wiring layer; and a step of forming contact plugs and a buried wiring layer by removing the conductive layer on the interlayer insulating film.


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