Method of manufacturing a semiconductor memory device incorporating a capacitor therein

Abstract

A method for manufacturing a ferroelectric random access memory (FeRAM) device which includes the steps of preparing an active matrix provided with a transistor, diffusion regions, an isolation region, a bit line, a first insulating layer and a second insulating layer; forming a first conductive layer and then a dielectric layer on the active matrix; carrying out a rapid thermal annealing (RTA) for producing nuclei in the dielectric layer; forming a second conductive on top of the dielectric layer; carrying out a thermal annealing in a furnace; forming a capacitor structure provided with a top electrode, a capacitor thin film and a bottom electrode by patterning the second conductive, the dielectric and the first conductive layers into a first predetermined configuration; carrying out a first recovery; forming a third insulating layer on the capacitor structure and the second insulating layer; patterning the third insulating layer to form a first opening and a second opening; and carrying out a second recovery.