The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 26, 2002
Filed:
Oct. 30, 2000
Ramon S. Co, Trabuco Canyon, CA (US);
Tat Leung Lai, Torrance, CA (US);
Thang Nguyen, Santa Ana, CA (US);
Kingston Technology Co., Fountain Valley, CA (US);
Abstract
Margin testing of memory modules uses a personal computer (PC) motherboard. A test adaptor board has a test socket that receives a memory module under test. Pins from the test adaptor board are plugged into holes of a removed memory-module socket on the motherboard, mounted on the reverse, solder side of the motherboard. The test adapter board has a voltage regulator that controls the power-supply (Vcc) voltage applied to the module under test. A delay circuit on the test adapter board varies the phase delay of a clock to the memory module under test. Margin control signals are generated by a controller card in the PC's expansion slots, to control Vcc and clock delay to the module under test without changing the motherboard's Vcc voltage. The test program executing on the PC motherboard writes to the controller card to adjust voltage and delay, allowing Vcc and setup and hold margins to be tested.