The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2002

Filed:

Dec. 23, 1999
Applicant:
Inventors:

Lorrie L. Gampp, Reseda, CA (US);

Gregory Zimmerman, Layton, UT (US);

Arthur R. Martinez, Canoga Park, CA (US);

Thomas M. Flaherty, Agoura Hills, CA (US);

Christine E. Geosling, Calabasas, CA (US);

Assignee:

Litton Systems, Inc., Woodland Hills, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/12 ;
U.S. Cl.
CPC ...
G02B 6/12 ;
Abstract

An integrated optics chip includes an optical waveguide network formed on a surface of an electrooptically active material. The optical waveguide network has an input facet where an optical signal may be input to the optical waveguide network and an output facet where optical signals may be output from the optical waveguide network. One or more trenches is formed in the bottom surface of the surface and arranged to extend into the substrate toward the optical waveguide network to a depth of at least 70% of the thickness. The trenches prevent light rays incident thereon from inside the substrate from propagating to the output facet. In particular, the trenches prevent light scattered at the input facet or from scattering centers in the optical waveguide network from reflecting from the bottom surface of the substrate to the output facet. A cover may be mounted to the top surface of the substrate to provide structural strength to the integrated optics chip. The cover preferably extends substantially the entire length of the substrate. One or more side grooves may be formed in the sides of the substrate and cover. A light absorbing material may be placed in the trenches and grooves. An electrode pattern may be formed on the top surface of the substrate adjacent the optical waveguide network, and a plurality of access electrodes may be formed on sides of the substrate and cover to provide electrical signals to the electrodes.


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