Memory device capable of preventing from illegally read out memory contents

Abstract

A coincidence circuit outputs a coincidence signal when a specific address derived from a specific address setting circuit and an input address coincided with each other. A counter circuit outputs a pulse signal each time the coincidence signal is inputted to a specified number of times. According to the pulse signal, a multiplexer switching circuit toggles the output of the multiplexer to the false data side connecting to a false data conversion circuit over a specified range of addresses. Thus, when addresses of the memory cell array are scanned in an unauthorized user's attempt at an illegal read, the false data is mixed into the read data at a specified period, making it difficult to reproduce correct data or correct programs from the acquired data. Consequently, with this memory device, it is impossible to reproduce correct data or correct programs even if an attempt to illegally read memory contents is made.