The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2002

Filed:

Sep. 10, 1998
Applicant:
Inventors:

Gerard M. Col, Austin, TX (US);

G. Glenn Henry, Austin, TX (US);

Arturo Martin-de-Nicolas, Austin, TX (US);

Assignee:

IP-First, L.L.C., Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/312 ;
U.S. Cl.
CPC ...
G06F 9/312 ;
Abstract

An apparatus and method are provided for combining multiple instructions prescribing accesses to a microprocessor stack into a single micro instruction. The apparatus includes a translator and access alignment logic. The translator receives a first stack access instruction and a second stack access instruction from an instruction queue, and decodes them into an associated micro instruction directing the microprocessor to accomplish both accesses prescribed by the stack access instructions during a combined access, wherein the combined access is achieved in a single instruction cycle. The access alignment logic is coupled to the translator and indicates alignment of two data entities within a cache for the combined access. The two stack access instructions are not combined when the access alignment logic indicates that the combination of the data entities is misaligned within the cache.


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