The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2002

Filed:

May. 14, 1999
Applicant:
Inventors:

Dirk Robert Walter Leipold, Landshut, DE;

Wolfgang Heinz Schwartz, Ergolding, DE;

Karl-Heinz Kraus, Freising, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/711 ; H01L 2/362 ; G11C 1/100 ;
U.S. Cl.
CPC ...
H01L 2/711 ; H01L 2/362 ; G11C 1/100 ;
Abstract

The invention relates to an integrated CMOS circuit for use at high frequencies with active CMOS components ( ) and passive components ( ). The active CMOS components ( ) are formed in a semiconductor substrate ( ) which has a specific resistivity in the order of magnitude of k&OHgr;cm. In the semiconductor substrate ( ), and under the active CMOS components ( ), a buried layer ( ) is formed which has a specific resistivity in the order of magnitude of &OHgr;cm. The passive components ( ) are formed in or on a layer ( ) of insulating material which is arranged on the semiconductor substrate ( ). A conducting contact layer ( ) is arranged on that surface of the semiconductor substrate ( ) which is not facing the layer ( ) of insulating material.


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