The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 19, 2002
Filed:
Mar. 23, 1999
Shye-Lin Wu, Hsinchu, TW;
Abstract
A method for fabricating MOSFETs with a recessed self-aligned silicide contact and extended source/drain junctions is described. A gate structure having a gate insulating layer, a first conductive layer and a first dielectric layer is formed on a substrate. A thermal oxide layer is formed on the substrate and on sidewalls of the first conductive layer. Sidewall spacers are formed on sidewalls of the gate structure. The thermal oxide layer uncovered by the sidewall spacers is removed. The substrate is isotropically etched to form recessed regions on the substrate in regions uncovered by the gate structure and the sidewall spacers. A first metal layer is formed on the substrate after the first dielectric layer is removed. A source/drain/gate implantation is performed to the substrate, thereby forming source/drain regions under the recessed regions.