The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 12, 2002

Filed:

Feb. 23, 2000
Applicant:
Inventors:

Bruce C. H. Cheng, Taipei, TW;

Timothy Chen-Yu Yu, Taipei, TW;

Kelly Jui-Yuan Shyu, Taipei, TW;

Szu-Lu Huang, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01R 2/400 ;
U.S. Cl.
CPC ...
H01R 2/400 ;
Abstract

The present invention discloses a direct-current (DC) electric connector that includes plurality of conductive and insulation layers constituting a near-zero inductance connector. The connector further includes a top and a bottom insulation-and-protection covers covering and protecting the plurality of conductive and insulation layers. The top and bottom insulation-and-protection covers having a tapered outer surface for providing a tapered profile along a horizontal direction toward a connector opening for receiving a printed circuit board into the near-zero inductance connector. The connector further includes a locking cartridge for adaptively enclosing the near-zero inductance connector with the printed circuit board inserted therein. The locking cartridge has top and bottom surfaces each engages the top and bottom insulation-and-protection covers respectively for horizontally pushing toward a direction having a gradually increased profile height for generating a vertical pressing force. The vertical pressing force is applied to securely pressing and locking the top and bottom insulation-and-protection covers to the plurality of conductive and insulation layers with the printed circuit board inserted therein.


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