The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 2002

Filed:

Dec. 21, 2000
Applicant:
Inventor:

John S. Prentice, Palm Bay, FL (US);

Assignee:

Intersil Americas Inc., Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/22 ;
U.S. Cl.
CPC ...
H03K 5/22 ;
Abstract

A bias circuit that provides biasing for a differential circuit. The bias circuitincludes first and second transistors, first and second impedance devices, a reference current source and an amplifier. The first and second transistors each have a control input and a current path coupled between a first node and ground, where the control inputs of the first and second transistors receive the differential signal. The impedance devices are each coupled between a control input of one of the first and second transistors and a second node. The reference current source provides a reference current for the first node and the amplifier has an input coupled to the first node and an output coupled to the second node. The transistors of the bias circuit and the differential circuit may be matched, NPN bipolar junction transistors with emitters connected to ground. A filter capacitor may be coupled between the first node and ground and operates as a low pass filter.


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