The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2002

Filed:

May. 18, 1999
Applicant:
Inventor:

John Lo, Fremont, CA (US);

Assignee:

Sun Microsystems, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/50 ; G06F 1/110 ;
U.S. Cl.
CPC ...
G06F 7/50 ; G06F 1/110 ;
Abstract

A one's complement adder uses two two's complement adders, both of which are coupled to receive first and second addends at their addend inputs, however the first two's complement adder is adapted to output a first sum that is the one's complement sum that would result if no carry occurred upon addition of the first and second addends and the second two's complement adder is adapted to output a second sum that is the one's complement sum that would result if a carry did occur. A selector selects one of the first sum and the second sum as its output (and the output of the one's complement adder) based on whether or not a carry occurred. The indication of whether or not a carry occurred or not can be determined from the carry output of the first complement adder, with the first sum effected by setting the carry input for the first two's complement adder to “0” (no carry in) and the second sum effected by setting the carry input for the second two's complement adder to “1” (carry in). The selector can be a multiplexer with a select input coupled to the carry output of the first two's complement adder.


Find Patent Forward Citations

Loading…