The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 22, 2002
Filed:
Jul. 30, 2001
Stefan Auracher, Baierbrunn, DE;
LSI Logic Corporation, Milpitas, CA (US);
Abstract
An apparatus for testing a functional operation of a memory related circuit. The memory related circuit may be represented by a first circuit model defining a circuit under test. The apparatus may comprise a storage device and a processor. The storage device may be configured for storing the first circuit model representing the circuit under test, and for storing a second circuit model. The second circuit model may represent a testbench circuit for interfacing with the circuit under test, and may include a first memory and monitor circuitry. The first memory may be configured for interfacing with a first port of the circuit under test. The monitor circuitry may be configured for interfacing with the at least one of said memory and a second port of the circuit under test, for monitoring the response of the circuit under test as simulated signals are applied thereto. The processor may be configured for processing the first and second circuit models to simulate the response of the circuit under test when the simulated signals are applied thereto via the testbench circuit. The simulated signals may simulate read and write accesses to the circuit under test.