Method and apparatus for handling invalidation requests to processors not present in a computer system

Abstract

A node controller ( ) in a computer system ( ) includes a processor interface unit ( ), a memory directory interface unit ( ), and a local block unit ( ). In response to a memory location in a memory ( ) associated with the memory directory interface unit ( ) being altered, the processor interface unit ( ) generates an invalidation request for transfer to the memory directory interface unit ( ). The memory directory interface unit ( ) provides the invalidation request and identities of processors ( ) affected by the invalidation request to the local block unit ( ). The local block unit ( ) determines which ones of the identified processors ( ) are present in the computer system ( ) and generates an invalidation message for each present processor ( ) for transfer thereto. Each of the present processors ( ) process their invalidation message and generate an acknowledgment message for transfer to the processor interface unit ( ) that generated the invalidation request. The local block unit ( ) determines which ones of the identified processors ( ) are not present in the computer system ( ) and generates an acknowledgment message for each non-existent processor ( ). Each acknowledgment message is transferred to the processor interface unit ( ) which generated the invalidation request.