The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 15, 2002

Filed:

Nov. 15, 1999
Applicant:
Inventors:

Tiemin Zhao, Palo Alto, CA (US);

Xinping He, San Jose, CA (US);

Datong Chen, Fremont, CA (US);

Assignee:

Omnivision Technologies, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 3/106 ;
U.S. Cl.
CPC ...
H01L 3/106 ;
Abstract

A photodiode with an optimized floating P+ region for a CMOS image sensor. The photodiode is constructed with a P+/Nwell/Psub structure. The Nwell/Psub junction of the photodiode acts as a deep junction photodiode which offers high sensitivity. The P+ floating region passivates the silicon surface to reduce dark currents. Unlike a traditional pinned photodiode structure, the P+ region in the present invention is not connected to the Pwell or Psub regions, thus making the P+ region floating. This avoids the addition of extra capacitance to the cell. The photodiode may be included as part of an active pixel sensor cell, the layout of which is fully compatible with the standard CMOS fabrication process. This type of active pixel sensor cell includes the photodiode, and may be configured with a three transistor configuration for reading out the photodiode signals. Examples of other configurations that the photodiode can be used with include two transistors, four transistors, log scale, as well as its ability to be used in a passive pixel implementation. Also, an additional optional N type layer can be introduced in between the P+ region and Nwell to fine tune the junction profile for special applications. In addition, the field oxide region may be made to extend over the photodiode, so as to reduce the exposure of the diode area to the field oxide region edge, which can be a source of dark current due to the high electric fields and mechanical stresses.


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