The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2002

Filed:

Jul. 02, 1999
Applicant:
Inventors:

Kazuyuki Kanazashi, Kawasaki, JP;

Toshiya Uchida, Kawasaki, JP;

Masaki Okuda, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract

One aspect of the present invention is that, when the memory is in the non-power-down state, the supply of clock signals to the data output circuit is limited to the read status after the reception of a read command, and no clock signal supply is performed when either the active status or the write status is in effect. In the best aspect, furthermore, in the read status after the reception of a read command, the supply of clock signals to the data output circuit starts after a number of clock signals corresponding to a set CAS latency following the read command, and stops after a number of clock signals corresponding to a set burst length, after the output of the read out data from the data output circuit starts. Accordingly, even in the non-power-down state, clock signals are only supplied during the time required for the read out data to be actually output from the data output circuit to the outside, whereby it is possible to reduce the number of clock signal supply actions that require large current drive.


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