The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2002

Filed:

Nov. 20, 2000
Applicant:
Inventor:

Akira Suzuki, Kunitachi, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract

The semiconductor of the present invention comprises: a buffer circuit ( ) which operates by the supply of a first power source potential VDD and an N-type MOSFET ( ) connected between a pad ( ) pulled up to a second power source potential VDD and a ground. An output line ( ) of the buffer circuit ( ) is connected to a gate of the N-type MOSFET ( ). The semiconductor further comprises a potential setting circuit ( ) which sets a potential of the output line ( ) of the buffer circuit ( ) to a level lower than the threshold level of the N-type MOSFET ( ) when the supply of the first power source potential VDD is shut off. This potential setting circuit ( ) has a first and a second N-type MOSTETs ( ) which are connected in parallel between the output line ( ) of the buffer circuit ( ) and the ground. The first N-type MOSTET ( ) has a gate connected to the output line ( ) and functions as a forward diode. The second N-type MOSFET ( ) has a gate connected to the pad ( ) and is made conductive by a rise in the potential of the pad ( ) to make the potential of the output line ( ) to be the ground potential.


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