The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2002

Filed:

Oct. 12, 2000
Applicant:
Inventors:

Kazuyuki Yamasaki, Tokyo, JP;

Tonomi Egawa, Kawasaki, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract

The provision of a semiconductor memory device for which access times in burst mode can be improved with no increase in the chip surface area and with no increase in power consumption. A latch pulse selection circuit uses a control signal CA T to output an input control signal SALF and a control signal SALS, to a first latch group within a latch circuit as a latch pulse SAL A, and to a second latch group within the latch circuit as a latch pulse SAL A, respectively. Based on a control signal YS ˜YS input from a column decoder circuit , a Y selector is connected to a sense amplifier circuit via Y switches connected to the corresponding digit lines. The sense amplifier circuit comprises sense amplifiers, and performs data evaluations of the signal YD ˜signal YD from the Y selector. A latch circuit latches a data signal DT ˜data signal DT from the sense amplifier circuit into a first latch group and a second latch group via latch signals SAL and SAL respectively.


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