The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 01, 2002
Filed:
Dec. 09, 1999
Masahiko Takeuchi, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
A semiconductor device includes a plurality of real chip regions and dicing lines to separate the real chip regions on a semiconductor substrate. A dicing line includes a mark section and a mark forbidden region around the mark section. A dummy wiring pattern is formed to fill the dicing line or a portion of the real chip region to surround the mark section and the mark forbidden region. A dummy wiring pattern may be a single continuous wiring pattern or the single wiring pattern may be divided into segments. Alternatively, a dummy wiring pattern may be composed of a plurality of square portions arranged in a matrix fashion.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile