The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 01, 2002
Filed:
Mar. 02, 1999
Samsung Electronics Co., Ltd., Suwon, KR;
Abstract
There is provided a method for manufacturing a semiconductor device which can provide global planarization between a cell array region and a periphery region by a simple process. An interlevel dielectric layer is formed over the entire surface of a semiconductor substrate where a global step difference exists between a cell array region and a periphery region. A first material layer serving as a stopper is formed on the interlevel dielectric layer. A contact hole partially exposing the semiconductor substrate of the cell array region is formed by patterning the first material layer and the interlevel dielectric layer. A conductive layer is formed over the entire surface of the semiconductor substrate where the contact hole is formed. Global planarization is provided between the cell array region and the periphery region by performing a chemical mechanical polishing (CMP) process on the semiconductor substrate where the conductive layer is formed.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile