The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 01, 2002
Filed:
Jan. 06, 2000
Kiyoshi Mori, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
A manufacturing method of a semiconductor device obtaining performances respectively required in a MOS transistor in semiconductor memories and a MOS transistor in logic devices even in case of manufacturing a system LSI combining the semiconductor memories with the logic devices. Forming silicide films in a logic device region makes it possible to reduce the resistivity of diffusion regions and a conductive film of polysilicon or the like that will serve as an electrode of a resulting MOS transistor. Therefore, the semiconductor devices can be manufactured in which such the MOS transistor can be used as the MOS transistor in the logic devices that is required to operate at high speed and the MOS transistor is also formed in a DRAM or the like where miniaturization is required. Since no alternation is made of the structures of the respective MOS transistors, a semiconductor device whose performance is equivalent to that of the conventional counterpart can be manufactured.