The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 01, 2002
Filed:
Dec. 30, 1999
Robert T. Fuller, Mechanicsville, VA (US);
Frank Prein, Glen Allen, VA (US);
Other;
Abstract
A manufacturing process for producing dynamic random access memories (DRAMs) having redundant components includes steps for concurrently forming normal (i.e. non-fused) contacts to components of the DRAMs and anti-fused contacts to the redundant components. The process by which the normal and anti-fused contacts are made is readily implemented using standard integrated circuit processing techniques. An anti-fuse contact ( ) and a normal (i.e. non-fused) contact ( ) are formed by opening respective contact areas in a dielectric ( ), selectively forming an insulating layer ( ) over the anti-fuse contact, applying polysilicon ( ) to cover the insulating layer of the anti-fuse contact and to fill the opening over the normal contact. In one embodiment of the invention, the circuit region served by the anti-fuse contact is subject to ion implantation ( ) to improve its conductivity before the anti-fuse contact is formed. In another embodiment of the invention, the anti-fuse is formed in an isolated well ( ) on the integrated circuit device and a non-fused contact ( ) to the well is also provided to aid in blowing the anti-fuse.