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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6334179 B1

PDFFull Text
Date of Patent:
Dec. 25, 2001

Filed:

Jan. 27, 1999

Dsp coprocessor having control flags mapped to a dual port section of memory for communicating with the host

Applicant:
Inventors:

Philip Curran, Dublin, IE;

Brian Murray, Dublin, IE;

Paul Costigan, Dublin, IE;

Mark Dunn, Dublin, IE;

Assignee:

Masaana Research Limited, Dublin, IE;

Attorney:

Jacobson Holman, PLLC

Primary Examiner:

Meng-Al T An

Assistant Examiner:

Wen-Tai Lin

Int. Cl.
CPC ...
G06F 1/516 ;
U.S. Cl.
CPC ...
G06F 1/516 ;
Abstract

A DSP coprocessor,is connected to a host sub-system (,). The host sub-system (,) has a host processor (,), a host RAM (,), and shared RAM banks (,). Multiplexers (,) provide access for either the DSP or the host to a shared RAM bank. Macro commands for functions of the DSP coprocessor are retrieved from the shared RAM banks. This allows comprehensive interaction of the host and the DSP coprocessor.

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Curran, Philip. (2001). Dsp coprocessor having control flags mapped to a dual port section of memory for communicating with the host (U.S. Patent No. 6334179). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6334179

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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