The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2001

Filed:

Nov. 17, 1998
Applicant:
Inventors:

Na Ra Won, Ichon-shi, KR;

Wook Jin Cha, Ichon-shi, KR;

Sung Sik Lee, Ichon-shi, KR;

Sung Goo Park, Ichon-shi, KR;

Ji Ho Ryoo, Ichon-shi, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/200 ;
U.S. Cl.
CPC ...
G06F 1/200 ;
Abstract

A combined cache with main memory and a control method thereof, which can be configured with various structures of cache by only adding a minimized control circuit in order to be used as main memory. The N-way cache memory system includes N cache memory blocks receiving a tag field and an offset field of an address bus, a logic OR element for performing a logic OR operation with way hit signals from each cache memory block and for generating a cache hit signal when a way hit signal is produced in one of the cache memory blocks, and a first selection element for outputting data to a data bus, which results from the cache memory blocks in response to the way hit signal.


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