The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2001

Filed:

May. 25, 2000
Applicant:
Inventors:

Ajit M. Dubey, Sunnyvale, CA (US);

Raj N. Master, San Jose, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/144 ; H01L 2/148 ; H01L 2/150 ;
U.S. Cl.
CPC ...
H01L 2/144 ; H01L 2/148 ; H01L 2/150 ;
Abstract

A method of maintaining z-height of an integrated circuit component, such as a multi-chip module, a chip or a die, and of visualizing alignment of an integrated circuit package during positioning of an integrated circuit component, is disclosed. The method maintains the z-height of an integrated circuit component during a solder reflow step by applying high-melting solder balls to interconnect pads on the package substrate surface. Such high-melting solder balls, for instance 90 Pb/10 Sn, do not collapse at temperatures sufficient to accomplish reflowing. The high-melting solder balls also make convenient visualization marks for alignment of the package substrate on an integrated circuit component placement tool, such as a die placement tool. A package substrate bearing high-melting solder balls in a pre-determined pattern is easily aligned by an integrated circuit placement tool using machine vision. Use of high-melting solder balls as visualization marks obviates the need for screen-printing of fiducial marks on the package substrate surface.


Find Patent Forward Citations

Dubey, Ajit. (2001). Process of ensuring detect free placement by solder coating on package pads (U.S. Patent No. 6333210). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6333210

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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