The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 18, 2001
Filed:
Oct. 26, 2000
Applicant:
Inventors:
Janet S. Y. Wang, San Francisco, CA (US);
Narbeh Derhacobian, Belmont, CA (US);
Ravi S. Sunkavalli, Milpitas, CA (US);
Assignee:
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/604 ;
U.S. Cl.
CPC ...
G11C 1/604 ;
Abstract
A method of erasing a memory cell that includes a first region and a second region with a channel therebetween and a gate above the channel, and a charge trapping region that contains a first amount of charge. The method includes simultaneously applying a first positive voltage across the gate and a second positive voltage to the first region, wherein the second positive voltage is greater than the first positive voltage.
Wang, Janet S. Y.. (2001). Positive gate erasure for non-volatile memory cells (U.S. Patent No. 6331952). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6331952
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile