Field effect transistor

Abstract

A field effect transistor has a semiconductor lamination structure, a Schottky contact gate electrode and source/drain ohmic electrodes disposed on both sides of the gate electrode on the lamination structure, source/drain regions disposed under the source/drain electrodes, a channel layer disposed in the lamination structure spaced apart from the principal surface and connecting the source/drain regions, a barrier layer disposed in the lamination structure between the channel layer and the principal surface and having a conduction band edge energy higher than the channel layer, and a pair of impurity doped regions formed in the barrier layer and channel layer continuously with the source/drain regions on both sides of the gate electrode, wherein a carrier density in the barrier layer is lower than a carrier density in the channel layer in the impurity doped region. A filed effect transistor and its manufacture method are provided which can lower the source resistance of the field effect transistor while the gate breakdown voltage is maintained high.