The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 11, 2001
Filed:
Feb. 01, 2000
Boon Yong Ang, Cupertino, CA (US);
Kenneth R. Harris, San Jose, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
An outer edge ring of a semiconductor wafer is polished to prevent delamination and peeling-off of at least one layer of material deposited near the outer edge of the semiconductor wafer during fabrication of integrated circuits. The semiconductor wafer is mounted on a wafer chuck, and the wafer chuck holding the semiconductor wafer is rotated such that the semiconductor wafer rotates. A polishing pad is moved toward the semiconductor wafer as the semiconductor wafer is rotating. The polishing pad has a polishing surface that faces and contacts the outer edge ring of the semiconductor wafer as the polishing pad is moved toward the semiconductor wafer to polish the outer edge ring of the semiconductor wafer. The outer edge ring has the at least one layer of material that is polished off by the polishing surface of the polishing pad. The polishing surface of the polishing pad may be tapered such that the edge of an upper layer of material that is disposed further from the semiconductor wafer is disposed more inward toward the center of the semiconductor wafer such that the upper layer of material is not likely to delaminate and peel-off away from a lower abutting layer of material on the semiconductor wafer. Furthermore, a photodetector may determine sufficient polishing of the outer edge ring of the semiconductor wafer.