The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 04, 2001

Filed:

Mar. 30, 1999
Applicant:
Inventors:

Jerald K. Alston, Portola Hills, CA (US);

Mark L. Craven, Laguna Hills, CA (US);

Henry Tran, Irvine, CA (US);

Assignee:

QLogic Corporation, Aliso Viejo, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/300 ;
U.S. Cl.
CPC ...
G06F 1/300 ;
Abstract

An add-on card is provided for use within a computer system that has an expansion slot connected to a bus. The bus has a first supply line for supplying a first predetermined voltage and a second supply line for supplying a second predetermined voltage which is higher than the first predetermined voltage. The add-on card is adapted to operate properly regardless of whether the respective predetermined voltages are supplied on (1) the first supply line only, (2) the second supply line only, or (3) both supply lines. In a PCI bus implementation, where 3.3V and 5V are the predetermined voltage levels, the add-on card operates properly regardless of whether: only a 5V level is provided, only a 3.3V level is provided, or both 3.3V and 5V levels are provided.


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