Sense amplifier of semiconductor integrated circuit

Abstract

A semiconductor integrated circuit includes a sense amplifier for amplifying an input signal and an complementary input signal, a full differential amplifier for amplifying the output of the sense amplifier, and a latch for latching the output of the full differential amplifier and outputting the latched output. The full differential amplifier includes a first differential amplifying unit for increasing the voltage of an output port when the level of an input signal input through an input port is larger than the level of an complementary input signal input through an complementary input port and reducing the voltage of the output port when the level of the input signal is lower than the level of the complementary input signal, a second differential amplifying unit for reducing the voltage of an complementary output port when the level of the input signal is larger than the level of the complementary input signal and increasing the voltage of the complementary output port when the level of the input signal is lower than the level of the complementary input signal, and an output voltage level control circuit connected between the output port and the complementary output port. The output voltage level control circuit controls the voltage levels of the output signals output from the output port and the complementary output port. The sense amplifier can stabilize the operation of the latch by reducing the mean voltage level of the output signal even when the supply A voltage increases, can easily control the voltage gain of the full differential amplifier by controlling the resistance, and stably operates at high speed. The current sense amplifier can include resistors associated with PMOS transistors to avoid unstable operation caused by increased transconductance arising from higher operating voltage.