The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 04, 2001
Filed:
Sep. 23, 1999
Ken Numata, Tsuchiura, JP;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A twisted bit line structure (,) in an integrated memory circuit, and method for making it are presented. The structure is constructed by forming bit line traces (,) on an integrated circuit substrate using phase shift lithography techniques. Using these techniques, the bit line traces are arranged with a plurality of substantially parallel bit lines trace segments (,) with discontinuous regions between segments of each trace along a path substantially perpendicular to the bit line traces. Thus, each “phase &pgr;” bit line trace is adjacent a “phase 0” bit line trace along two perpendicular axes. A twist connection (,) is formed between first segments (,) of a center pair (,) of said bit line trace segments, and a bit line twist interconnection (,) is formed between second segments (,) of said center pair of said bit line trace segments on a second integrated circuit level from a level containing the bit line traces. Linear interconnections (,) are also formed between segments of outside bit line segments (,) to form continuous untwisted bit lines. The linear interconnections are also formed on an integrated circuit level different from the level containing the bit line traces.