Semiconductor device

Abstract

A semiconductor device comprises a semiconductor body (,) having a region (,) of a first conductivity type adjoining a surface (,) of the semiconductor body (,), which semiconductor body (,) is provided at the surface (,) with a non-volatile memory cell. The memory cell comprises a source (,) and a drain (,) of an opposite, second conductivity type provided in the semiconductor body (,), between which source (,) and drain (,) the surface (,) of the semiconductor body (,) is provided with a floating gate (,) and a select gate (,). The floating gate (,) and the select gate (,) both have a substantially flat surface portion (,) extending substantially parallel to the surface (,) of the semiconductor body (,) and side-wall portions (,) extending substantially transversely to the surface (,) of the semiconductor body (,). A control gate (,) is situated above the floating gate (,), and is capacitively coupled to the substantially flat surface portion (,) of the floating gate (,) and to at least the side-wall portions (,) of the floating gate (,) facing the source (,) and the drain (,). Moreover, the control gate (,) overlaps the select gate (,) and ends above the substantially flat surface portion (,) of the select gate (,).