The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 04, 2001
Filed:
May. 14, 1999
Masato Kawata, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
A non-volatile semiconductor, memory manufacturing method, according to the present invention, comprises: the process steps of depositing a layer of floating gate material such as a polysilicon layer, and an insulation layer such as a silicon oxide layer, a silicon nitride layer, or the combination of the above, on the surface of a semiconductor substrate, wherein, multiple device isolating layers, for isolating adjacent devices, have been formed on the substrate; and etching the layers deposited in a peripheral region of the non-volatile semiconductor memory. The non-volatile semiconductor memory comprises the peripheral region and a memory region. Through the above process steps, the multiple device isolating layers are maintained, as they are, without possible partial losses.