The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2001

Filed:

Oct. 20, 1998
Applicant:
Inventor:

Toshihiko Himeno, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract

A semiconductor memory device has an address input circuit system capable of specifying a virtual memory space having a capacity larger than the actual storage capacity and a decoder system and sets the output terminal of a data output circuit system into a high impedance state when an address other than the previously specified addresses for the real memory space is specified. A plurality of semiconductor memory devices described above are used to construct a semiconductor memory system by commonly connecting corresponding ones of all of the input/output signal pins in parallel.


Find Patent Forward Citations

Himeno, Toshihiko. (2001). Semiconductor memory device using a plurality of semiconductor memory chips mounted in one system and a semiconductor memory system using a plurality of semiconductor memory devices (U.S. Patent No. 6324114). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6324114

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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