The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2001

Filed:

Dec. 21, 1999
Applicant:
Inventor:

Dev Alok, Danbury, CT (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 3/10312 ;
U.S. Cl.
CPC ...
H01L 3/10312 ;
Abstract

A lateral metal-oxide-semiconductor field effect transistor (LMOSFET) having a self-aligned gate, includes a first layer of SiC semiconductor material having a p-type conductivity, and a second layer of SiC semiconductor material having an n-type conductivity formed on the first layer. Source and drain regions having n-type conductivities are formed in the second SiC semiconductor layer. The n-type conductivities of the source and drain regions are greater than the n-type conductivity of the second SiC layer. A trench extends through the second SiC semiconductor layer and partially into the first SiC semiconductor layer. The trench is coated with a layer of an electrically insulating oxide material and partially filled with a layer of metallic material. The layers of oxide and metallic material form a gate structure. A channel region is defined in the first layer beneath the gate structure, and electrical contacts associated with the source and drain regions, and the gate structure, establish source, drain, and gate electrodes of the LMOSFET.


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