Method to fabricate deep sub-&mgr;m cmosfets

Abstract

The method of the present invention is to fabricate a CMOS device without boron penetration. A nitrided gate oxide and SAS gate electrode are provided to suppress boron penetration. The nitrided gate oxide could be formed in two approaches. One of the approaches is to implant nitrogen ions into the interface between substrate and pad oxide layer, and then thermally treat the substrate for segregating the doped nitrogen ions in the surface of substrate. Removing the pad oxide layer, thermally treating the substrate in oxygen ambient for growing a gate oxide layer, the nitrided gate oxide layer is formed by incorporating doped nitrogen ions into the growing gate oxide layer. The other approach is to place the substrate having a gate oxide layer thereon in nitrogen plasma ambient, thereby forming the nitrided gate oxide layer. After the formation of nitrided gate oxide layer, at least one stacked amorphous silicon (SAS) layer is formed over the gate oxide layer. The gate structure is formed by patterning the SAS layer and nitrided gate oxide layer. Thereafter, source/drain with LDD regions are subsequently formed in the substrate. Finally, a thermal treatment is performed to convert the stacked-amorphous silicon gate into poly silicon gate and to form shallow source and drain junction in the substrate, thereby achieving the structure of the MOS device.