The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2001

Filed:

May. 31, 2000
Applicant:
Inventors:

Hiroaki Ammo, Kanagawa, JP;

Hiroyuki Miwa, Tokyo, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/18238 ; H01L 2/18249 ;
U.S. Cl.
CPC ...
H01L 2/18238 ; H01L 2/18249 ;
Abstract

Disclosed is a method of fabricating a semiconductor device in which at least an LDD type insulated-gate field effect transistor and a bipolar transistor are formed on a common base substrate. An insulating layer for forming side walls of an LDD type insulated-gate field effect transistor is formed by a stack of first and second insulating films. An opening is formed in the lower first insulating film at a position in a bipolar transistor forming area, and a single crystal semiconductor layer is formed on a base substrate through the opening. With this configuration, the fabrication steps can be simplified and the reliability of the semiconductor device can be enhanced.


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